Teh Stork wrote:Sorry to burst your bubble on capacitor location - but it's really not that good.
As I've outlined in this sketch; The green lines are the inductive loop between D-S (pos and gnd). This is priority number 1 - this is rather big as you can see. Also, a square is never good - you should strive to bring the leads together as much as possible. A solution would be to place a small ceramic capacitor right under the heatsink (shave some off the heatsink), this is marked in blue. If you do a PCB, witch I hope, you could mount electrolytics on the underside - and ceramics on the topside.
I'd like to add that high fet source to lower fet drain connection (phase connection point) isn't (countrary to popular belief) critical. Actually - a higher distance here will result in less ringing overshoot, a positive thing (but keep everything in moderation). When i "eliminated" phase node inductance my prototype ringing went into total avalanche mode with vds reaching 3 times input (but still within avalanche limits), and the ringing frequency was outside range of my cheap scope - with my schools expencive scope, the ringing was clear.
What actually is more important is gate driver placement. To sum up: DS decoupling first. Gate driver second. Phase node lastly.
Let me also add that running field oriented controll (or any controll method with some sort of space vector modulation) will cut down your current ripple by 60-70 % over normal six-step commutation, this is more important than optimizing layout. And before going apeshit over FOC; this is on a BLAC engine. A BLDC engine (trapezoidal bemf) with a six-step commutation can be just as efficient and well behaved as a BLAC sine controlled engine.
It's really dissappoiting to lay down countless hours down into optimizing FOC for use on a BLAC motor, then to have the same or better experience with a cheaper BLDC motor. I hate my HS3540 and 12fet for working as nicely as it does. Only optimalization is field weakening, thats as easy to implement on a blac as a bldc motor.
Getting lost in jibberish here, only want to tell you to observe the whole picture - don't overanalyse I've been down that hole.
Arlo1 wrote:Ok I am not sure if I understand you?? One peice of angle aluminum is the PHASE and the other is just a heat sync. So the caps will be in the best possible spot as close to the fet body as possible. I just held the cap in place to show an example!
Teh Stork wrote:Arlo1 wrote:Ok I am not sure if I understand you?? One peice of angle aluminum is the PHASE and the other is just a heat sync. So the caps will be in the best possible spot as close to the fet body as possible. I just held the cap in place to show an example!
Just meant to stress the point that you need to minimize layout inductance between positive rail and gnd, cap placement is only one piece of the puzzle. The fact that the fets is separated by a heatsink is nice thermally, but not optimal looking at the electical layout.
John in CR wrote:Why worry about thermally connecting the 2 pieces of angle iron? Does the hi side make more heat than the low side or vice versa? Connecting 2 heat sources together with an expensive material seems like a waste of money to me when it seems all that's needed is a simple insulator. The heat needs to go up to be dissipated away, not sideways toward another source of heat.
I like the modular approach you're doing. This looks simple enough that I could try it. Will we be able to connect our phase wires directly to 3 of the 6 angle iron segments and the battery + to the other 3, or am I missing something about the flow?
nieles wrote:if you use aluminium angle, be aware that aluminium oxide (Al2O3) is a electrical insulator (if you leave bare aluminum in contact with air, it will form a oxide layer in a few minutes/hours.
Check http://endless-sphere.com/forums/viewtopic.php?f=2&t=33614. It was based on a post by LFP. He described the soldering process that while not simple was easy enough that I could do it.
texaspyro wrote:nieles wrote:if you use aluminium angle, be aware that aluminium oxide (Al2O3) is a electrical insulator (if you leave bare aluminum in contact with air, it will form a oxide layer in a few minutes/hours.
More like under a millisecond...
nieles wrote:few questions related to the power buffer
the fets in the power buffer (Q1-Q8) will only see the voltage difference of 15v right? (no need for 100v fets?)
the ir2113 will only supply the gate charge for the mosfets q1-q8, and not the power mosfets right?
Lebowski wrote:Hey dude, nice to see you're making progress Pity you put in the wrong diodes (1N5819) though for the bootstrap supply..
Have a look here at the diode's data sheet:
Let's say your battery is 100V and you have 15V for the driver supply (as in your schematic). When the low side
is on all is cool, H_return gets pulled to ground and the diodes conduct to charge the bootstrap caps. When
the high side is on H_return is pulled to 100V by the main power FET. This means there's 115-15 = 100V reverse
voltage accross the bootstrap diodes. The 1N5819's are only rated for 40V reverse....
I would use MBR1100 or STPS2150 schottky diodes for the bootstrap (100V or 150V reverse capable).
What you can try is to shutdown the IR2113 with the SD pin (make this high, keep HIN and LIN low) and connect H_return
to gnd. Then measure the bootstrap voltage at pin VB. In steps increase H_return and see what happens (refresh bootstrap
voltage by connecting H_return to gnd inbetween the steps).
Once you've replace the bootstrap diodes and you still got problems, what may be the case is that you have shootthrough
through Q2 and Q4. Increase R1 to fix this.
Users browsing this forum: No registered users and 4 guests