BESC - beefed up VESC motor controller for high power ebikes

If one were willing to take a chance and give feedback on the layout of the BESC G2, would ordering and trying out your board be advisable? I'm in need of a moderate to high power controller for a commuter on high-speed roads, and the new BESC fits the bill perfectly. I'm certainly not going to expect the layout etc to be perfect and would consider any problems my own and any discoveries along the way a contribution to your project.
 
I'm in the process of making a BOM and optimizing cost. Components for 100V version will be around 200€ for one unit if you order it from mouser / farnell. Price should go down a lot with bulk orders. Still not bad for a 30 kW peak inverter and only twice as much as I estimated. :mrgreen:

Not included: PCB cost (~20€ per board), wires and connectors, busbars, enclosure and man-hours to solder and assemble this beast.

You could bring down the cost further by not fitting 12V DCDC converter and mounting something chinese externally.

PCB design is now finished and I'll order it today. I'll have few boards to spare so if you want one, write me a PM.

I added BOM and 3d step file to repository.
 
WOW ! I would love to test this controller in my mini e-bike project.

BDW i build that Paltatech controller and manage to go for 700 phase amps. And that is for my super e bike.

It would be great to use your design in my daily commuter.

Surely ordering pcb and bom in day or two and keep you updated.[emoji7][emoji16]


Love your work dude.

Sent from my COR-AL00 using Tapatalk

 
Hey! Just ordered PCBs and components for 2 units. If I get through debug without any smoke I should have an extra unit.

Offtopic: what kind of motor are you using on your ebike? I have a QS205 and I'm wondering at what current it starts to melt. :mrgreen: :mrgreen:
 
galp said:
Hey! Just ordered PCBs and components for 2 units. If I get through debug without any smoke I should have an extra unit.

Offtopic: what kind of motor are you using on your ebike? I have a QS205 and I'm wondering at what current it starts to melt. :mrgreen: :mrgreen:
Hey i am using custom build 100kw motor for my super e-bike prototype.

And using golden motor 5kw motor in my daily commuter. As the paltatech is overkill for this motor and vesc6 is not capable of driving this i decided to use your design.



Sent from my COR-AL00 using Tapatalk

 
galp said:
Hey! Just ordered PCBs and components for 2 units. If I get through debug without any smoke I should have an extra unit.

Offtopic: what kind of motor are you using on your ebike? I have a QS205 and I'm wondering at what current it starts to melt. :mrgreen: :mrgreen:

I'm looking at the QS series of mid-motor drives, probably a 2000 or 3000W for starters, and then one of the 9000W ones for an e-motorcycle build.
 
It looks like the gate drivers on the bottom of the board and all on one half (high or low side). While this makes for easier construction, it also means the gate drive signal is crossing through the power pass section which is a pretty big no no when attempting high current. While I don't recommend this, make sure it crosses at 90 degrees, but once it gets to the other side it's still going to run parallel to the power pass and will have some coupling. I hope your chosen gate driver has a miller clamp to help mitigate induced voltage spikes on the gate signal path.

As for the copper bus bars, you will experience board warping when you solder them. I've done it many time, with some careful iron work and flexing the board you can get some of the warping out, but long runs of copper will cause board warping. When I did my 18 FET TO-247 controller I broke the board up into 3 separate phases in order to minimize the warping effect.
 
I had to choose between routing gate drive signal through high current or supply + signal + ground for a single driver on the other side. The first seemed more logical.

Soldering copper to PCB with a soldering iron makes the board wrap like you described. But that's not the case if you solder the busbars with solder paste and in reflow oven. At least that's my experience with previous builds.
 
Personally I think it would be better to route the PWM signal around the power pass section to a separate gate driver on the other side, but I prefer reliability and robustness over ease of design. The gate driver layout is the most critical part of the entire design. If you manage to induce enough voltage into the gate signal path, it's possible to have MOSFETs turn on when they should not be on causing a shoot through condition since it takes very little current to charge the G-S effective capacitance and reach Vgs(th). Having a miller clamp on the gate driver signal really helps at reducing issues because it causes any unpowered gate drive path to be pulled to ground and become low impedance thus making and induced pulse difficult to propagate because the low resistance path to ground is difficult to overcome.

The reason I suggest routing the PWM signal around the power pass is it doesn't really care how long the path is, it's just a digital signal and it's typically going to power an isolated gate driver, often times an optocoupler. In all cases you want to keep it as far away from the power pass as possible. It takes a lot more current to turn on an LED with a transient spike + the response time is slower. You can also carry the PWM ground plane with the traces or utilize differential signalling to reject common mode noise.

Another option is to utilize a twisted pair flying lead to get the PWM or even the gate drive signal over the power pass at a 90 degree angle while increasing the distance. Keeping things at a 90 to your bus bars parallel direction is critical to avoid coupling.

Just some ideas to think about. Layout is everything when designing a controller. At lower power it's possible to get away with a so so layout, but once you start jumping up to the higher power levels the game changes. It's possible to bodge around design issues, but it's better to avoid them all together. Fundemental rule of design is nothing goes directly through the power pass, this one simple rule makes layout very tricky to accomplish.

Thanks for the tip on using a reflow oven, I've never tried that myself.

What gate driver are you using?
 
zombiess said:
the gate drive signal is crossing through the power pass section which is a pretty big no no

For clarification, are you referring to the power pass as the DC bus bars or the switch nodes going to the motor phases? The gate drive traces are passing through both of the these regions. If you are referring to the bus bars, then what are the consequences (if any) of the gate drive traces passing through the switch node areas?
 
shaman said:
zombiess said:
the gate drive signal is crossing through the power pass section which is a pretty big no no

For clarification, are you referring to the power pass as the DC bus bars or the switch nodes going to the motor phases? The gate drive traces are passing through both of the these regions. If you are referring to the bus bars, then what are the consequences (if any) of the gate drive traces passing through the switch node areas?

If it has a direct path to the DC link (such as through a MOSFET/IGBT), it's in the power pass area. No signals should enter this area, big boy stuff only.
 
I used similar mosfet driver on another controller and it works flawlessly on 200A phase current. It's been doing so for almost 1000 km on my ebike. While there's no direct overcurrent sensing built in the driver there is fault handling in system that is good enough.

Also if you know of better mosfet driver to use do tell.
 
galp said:
Part you listed is obsolete. :confused:

The datasheet says obsolete, but it seems to be readily available and active from digikey and mouser, so it's probably fine to use for new designs. With HighHopes and zombiess recommending the chip, I'd say it comes with some pretty strong credentials.
 
I second zombiess, his suggestion is a proven part, the TI chip doesnt cover short circuit protection, and zombiess/highhopes thread is something you should read and be very aware of.
You may want to keep your gate driver selection, but at least you should make it go through the same level of testing and debugging. There you might find you really want to have desat detection.
 
@galp try the TD350E. Is that one obsolete?

Also if you want to use TI, take a look at the ISO5452. It's got DESAT, miller clamp, a some other nice features. It only has 2.5A/5A drive strength though.
 
I reckon there are several options:
1. gate driver with desat. This is the most robust protection. The ACPL-33x series is also a choice, functionally similar to ISO5452. I use ACPL-332 nowadays. The difficulty with both of them is that they require 15V power supply, but some FETs operate better at lower gate voltage. To make it more complicated, isolated dc/dc converters are normally required for these drivers on the high side at least, because the bootstrap doesn't work very well due to the high quiescent current (bootstrap cap discharges in idle state). Miller clamp is also useful, but not needed for every FET.
Personally I'd prefer an isolated driver with supply voltage down to 10V, desat and miller-clamp, but there is no such driver.

2. analog comparators configured in window mode (2/channel), connected to the output of the current sensors, and shut down the drivers at overcurrent. With fast current sensors this can be almost as effective as the desat, but with exact current threshold. Unfortunately the VESC uC (STM32F4) has no internal comparators, but the STM32F303 (I'm using this) and the new STM32G4 series have. After the comparators are configured, this function works by pure hardware (without any software intervention and delay). External comparators could also be used.

3. not using any of the above and accepting that a short-circuit would damage the FETs and maybe other components. But in this case the whole controller is smaller and cheaper. This is also a valid option, because a short-circuit rarely happens in normal circumstances. It is more probable during development, otherwise in most cases the protection remains unused for the whole life of the product. Probably the most of the commercial and popular ebike controllers are made in this way, otherwise they would be more expensive and people wouldn't buy them.
 
galp said:
Part you listed is obsolete. :confused:

Here is the status of the part from ST micro, says it's still an active part
https://www.st.com/en/power-management/td350e.html

The reason I'm recommending this gate driver to you is not because it's a top of the line chip, it's because I've fully tested every single feature on them and have provided a lot of info about it on this forum. The app note also shows a boot strap config you can use, but they do not recommend doing so above 10kW (I suspect it would work OK myself). I've posted gate driver layouts for this chip which work on 2 layer PCBs and you could just copy them. I suggest that you do so with minimal changes unless you have deep knowledge of what Maxwell's equations represent and can visualize EM fields on the PCBs to some degree. Gate driver layout and part selection is critical to success when moving into the higher amperage designs. Everything you are putting on the PCB layout should have the smallest loop area you can manage.

There are better gate drivers available, but to design one correctly and then test it, you will have a significant investment of time and possibly money if you don't have the proper testing equipment like differential probes. If I do a gate driver layout, I would anticipate spending 40-80hrs of design time (even with previous experience, lot's of stuff to research and qualify), about half of that would probably be in PCB layout (do you like puzzles?). It's not a process you want to rush. Designs should be robust and fault tolerant.
 
peters said:
I reckon there are several options:
1. gate driver with desat. This is the most robust protection. The ACPL-33x series is also a choice, functionally similar to ISO5452. I use ACPL-332 nowadays. The difficulty with both of them is that they require 15V power supply, but some FETs operate better at lower gate voltage. To make it more complicated, isolated dc/dc converters are normally required for these drivers on the high side at least, because the bootstrap doesn't work very well due to the high quiescent current (bootstrap cap discharges in idle state). Miller clamp is also useful, but not needed for every FET.
Personally I'd prefer an isolated driver with supply voltage down to 10V, desat and miller-clamp, but there is no such driver.

If someone is going to use the ACPL-332 they shouldn't even consider not utilizing dedicated isolated supplies. The driver chip itself is a $5-6 part and you need 6 of them, might as well do it correctly. I could justify bootstrapping a TD350 (about $2ea), but I'd feel half baked doing it on a higher end part.

What is the reason you would like to run a supply voltage of 10V? On most MOSFETs you'll end up with a lower RDSon if you drive them into saturation close to +15V.

2. analog comparators configured in window mode (2/channel), connected to the output of the current sensors, and shut down the drivers at overcurrent. With fast current sensors this can be almost as effective as the desat, but with exact current threshold. Unfortunately the VESC uC (STM32F4) has no internal comparators, but the STM32F303 (I'm using this) and the new STM32G4 series have. After the comparators are configured, this function works by pure hardware (without any software intervention and delay). External comparators could also be used.

Hardware shutdown for the win! I've never tried this method with discreet parts, how long does it take to achieve shutdown with a method like this?

I think HighHopes told me the driver should shut everything down in <10us, I know the TDE350 did it in about 4-5us in some really extreme bench tests I performed, like repeatedly dumping over one hundred 500-100A pulses @ 100V through a single IRFP4568 FET at 10s intervals into some low inductance load I was using (~20uH i think) and I never exceeded the MOSFET spec sheet ratings and the MOSFET was fine.

3. not using any of the above and accepting that a short-circuit would damage the FETs and maybe other components. But in this case the whole controller is smaller and cheaper. This is also a valid option, because a short-circuit rarely happens in normal circumstances. It is more probable during development, otherwise in most cases the protection remains unused for the whole life of the product. Probably the most of the commercial and popular ebike controllers are made in this way, otherwise they would be more expensive and people wouldn't buy them.

LOL, you hit the nail on the head about tripping desat during development. I probably would have killed +20 devices in my initial testing without it saving my butt. Replacing MOSFETs sucks! As you said, once the device is hooked up, you rarely have to worry about shorts... unless the person installing it didn't make sure their wiring was done properly and friction or some other mechanical failure causes the phase leads to short. I've done both versions of this failure myself.
 
zombiess said:
What is the reason you would like to run a supply voltage of 10V?
I found that tuning the voltage would be useful for IRFP4568 for optimizing the transitions. The reverse recovery charge of this FET is extremely high compared to other FETs I used, and that's why at the end of the reverse recovery phase there is a harsh transition: at the Vgs rising (FET turning on), when Vgs falls from its local peak to the Miller-plateau there is a negative spike on the Vgs and some oscillation around the plateau. At the spike the Irr of the diode (of the other FET) falls to 0, the Id of the FET (turning on) falls from Iout+Irr to Iout, and at the same time the Vds falls. This transition can be made smoother (reducing the spike and the oscillation) with lower peak Irr (that corresponds to the peak Vgs before the plateau), by reducing di/dt. As usual, this can be done with higher Rg and external Cgs, but I have good results also with lower Vgs supply and keeping the Rg low. The main advantage is that the RC time constant remains low and the total gate transition is faster.
This article was helpful for me: in the downloadable pdf on page 5 there are some equations for di/dt and dv/dt; vcc is also a tuning parameter for the 'on' transitions:
https://www.researchgate.net/publication/29642114_STATE_OF_THE_ART_OF_DVDT_AND_DIDT_CONTROL_OF_INSULATED_GATE_POWER_SWITCHES
I'm talking about the moment at the arrow (Vgs):
IMG_20190713_122218.jpg

how long does it take to achieve shutdown with a method like this?
I didn't measure, but the delay should be comparable to desat, and it saved my FETs, too: current sensor rise time: 4us (ACS758), RC low pass filter on the sensor output: also a few us, comparator delay and timer break (fault) signal filtering: selectable in the uC, in my case they are set to ~1+1us, and the gate driver has a few 100 ns propagation delay and the off time is less than 1us. It was also useful for testing a PI contol loop to stop the current when it was about to overshoot. But the clear advantage of desat is the soft turn-off that also takes a few us, and it triggers at shoot-through, when the current sensor does not. Both have advantages, I'm going to incorporate both in my next complete design.
 
That's some good info Peters. I too have seen that same oscillation on the miller plateau in some of my previous testing. The way I handled it was to add a larger Cgs cap as you mentioned, and it worked really well in my own application, but my application was not noise sensitive. It appears your application is EMI sensitive, have you looked into the possibility of using soft switching vs hard switching? Is your scope shot a pulse test on the bench, or is it running a motor?

Based on my own testing with the IRFP4568, I've been able to cleanly switch 110A per device with turn on in 475ns and off in 575ns with a 92V DC bus which produced an 18V overshoot to 110V and virtually no ringing (I think ti was <2V peak to peak) post overshoot. This was using 9 IRFP4568's in parallel with near perfect current sharing, so the DC bus was carrying ~1kA. I saw no benefit to switching faster than these speeds and would most likely end up slowing them down a bit more for a full controller. Design has only been bench tested using double pulse (and multiple sequential pulses) but it has not been hooked up to drive a motor to verify that swinging 1kA with 100VDC bus at 20kHz this quickly doesn't cause additional problems. Once the power stage starts driving motor, everything tends to get noisier than double pulse bench tests.
 
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