This is a schematic I did as a learning exercise for a new schematic capture program. This is from a BMS I reverse engineered that is manufactured by Ayaa out of china, and remarketed under the Powerizer brand by Batteryspace.com. The PCB was laid out to handle a maximum of 10 series cells, but only populated with parts in this case for 7s. The pack was a LiPo 7s 8AH 25.9V nominal voltage made from Wanma cells.
The S-8261 and S-8241 are Seiko Instruments battery management ICs. Here they are used only as low power voltage detectors.
The S-8261 handle the overcharge and overdischarge detection functions. Over discharge is triggered at 2.5V and turns the Discharge FET off (Q40), Over discharge is released when the cell voltages go above 2.9V. Overcharge is detected at 4.325 V and turns the Charge FET off (Q52). Overcharge is released at a cell voltage of 4.1V. There are internal time delays in the ICs. An overdischarge condition must exist for 0.15 seconds to be recognized, An overcharge condition must exist for 1.5sec to be recognized. Release times have no delay.
If any cell drops below 2.5V, an overdischarge is detected and the S-8261 output turns on an associated PNP transistor that then turns on Q3 which pulls the gate of Q40 low and disconnects the battery from the load.
Likewise if any Overcharge is detected, the S-8261 turns on another PNP which turns on Q4 which pulls the gate of Q52 low and turns off charging to the battery. The gate drive voltage is supplied by tapping off the 3rd cell in the stack so the gate drive varies from 7.5v - 12.9V depending on the state of charge.
Q2 is the overcurrent cutoff circuit. If the current through Q40 and R46 is high enough to create a voltage around 0.46 V on the base of Q2, Q2 turns on and pulls the gate of Q40 Low, disconnecting the battery from the load. The Rdson of the 11 paralleled FETS that make up Q40 is about 1 milliohm, R46 is about 2 milliohms. It's not a very precise system, and it's quite temperature dependent. The overcurrent trip point would be in the 130-160 amp range at 25C.
Q1 is the Load removed detection circuit. If an overcurrent trip turns off the FETS, the load will pull the negative battery terminal up. As long as that negative terminal is pulled up by more than about 800mv (if the load is drawing more than about 1 microamp through R6,R8,R9) Q1 remains on, and keeps Q40 Off.
U8-U14 (S-8241) do the charge balancing. When a cell voltage reaches 4.2V they turn on a PFET which puts a 68 ohm resistor across the cell. This reduces the charging current into the cell by about 68 milliamps. All cells continue to charge. When any cell reaches 4.325V the Overcharge detection goes off on one of the S-8261 (U1-U7) and stops all charging. U8-U14 continue to discharge the cells until their cell voltage goes below 4.2V and then they turn off.
That about covers it.
For you circuit types I have a few posers for your entertainment
1) What do R22 and C1 do?
2) What is D1 for?
3) Why is R46 needed?
4) How can you reduce the cost of this?
The S-8261 and S-8241 are Seiko Instruments battery management ICs. Here they are used only as low power voltage detectors.
The S-8261 handle the overcharge and overdischarge detection functions. Over discharge is triggered at 2.5V and turns the Discharge FET off (Q40), Over discharge is released when the cell voltages go above 2.9V. Overcharge is detected at 4.325 V and turns the Charge FET off (Q52). Overcharge is released at a cell voltage of 4.1V. There are internal time delays in the ICs. An overdischarge condition must exist for 0.15 seconds to be recognized, An overcharge condition must exist for 1.5sec to be recognized. Release times have no delay.
If any cell drops below 2.5V, an overdischarge is detected and the S-8261 output turns on an associated PNP transistor that then turns on Q3 which pulls the gate of Q40 low and disconnects the battery from the load.
Likewise if any Overcharge is detected, the S-8261 turns on another PNP which turns on Q4 which pulls the gate of Q52 low and turns off charging to the battery. The gate drive voltage is supplied by tapping off the 3rd cell in the stack so the gate drive varies from 7.5v - 12.9V depending on the state of charge.
Q2 is the overcurrent cutoff circuit. If the current through Q40 and R46 is high enough to create a voltage around 0.46 V on the base of Q2, Q2 turns on and pulls the gate of Q40 Low, disconnecting the battery from the load. The Rdson of the 11 paralleled FETS that make up Q40 is about 1 milliohm, R46 is about 2 milliohms. It's not a very precise system, and it's quite temperature dependent. The overcurrent trip point would be in the 130-160 amp range at 25C.
Q1 is the Load removed detection circuit. If an overcurrent trip turns off the FETS, the load will pull the negative battery terminal up. As long as that negative terminal is pulled up by more than about 800mv (if the load is drawing more than about 1 microamp through R6,R8,R9) Q1 remains on, and keeps Q40 Off.
U8-U14 (S-8241) do the charge balancing. When a cell voltage reaches 4.2V they turn on a PFET which puts a 68 ohm resistor across the cell. This reduces the charging current into the cell by about 68 milliamps. All cells continue to charge. When any cell reaches 4.325V the Overcharge detection goes off on one of the S-8261 (U1-U7) and stops all charging. U8-U14 continue to discharge the cells until their cell voltage goes below 4.2V and then they turn off.
That about covers it.
For you circuit types I have a few posers for your entertainment
1) What do R22 and C1 do?
2) What is D1 for?
3) Why is R46 needed?
4) How can you reduce the cost of this?