Calculating controller power input capacitance

[Lagoethe]

just trying to bring a potential fly in the vaseline to your attention

Ok then. I think we agree.

Just use more capacitors than you calculate that you need.

The idea of doing the math is mainly to:
-understand the key points
-"sizing" the build. Of course there'll be some iterations after a first prototype.

There's a thread around here where texaspyro talks about all the "name brand" lowESR caps he's tested (just about everything on the market) and how bad they lie.

Are you sure it's texaspyro. I checked all his tread, but could'nt find it. Or to be a little bit more precise, I couldn't find a thread were he proved it.

But with this thread: http://endless-sphere.com/forums/viewtopic.php?f=30&t=22582 plus this http://www.rubycon.co.jp/en/catalog/e_pdfs/aluminum/e_zl.pdf
Even if I don't absolutely know how LFP measured ESR of Capacitor.
LFP: 50mOhms
Rubycon Note: 63 or 71mOhms (at 100kHz)
Rubycon doesn't seem to lie that much
It must be a bad example, no irony in this sentence.

Please I'd like to stop speaking of the lie of suppliers now because: even if really interesting, I don't think it's really the aim of this thread, or at least, we haven't been far enough to take care of such considerations.

So If we can get back to the main problem which is:
INPUT RIPPLE CURRENT CALCULATION

Have a nice day

 

[Alan B]

Rubycon is an example of a good capacitor.

 

[rhitee05]

It's difficult enough to make an accurate calculation of the input ripple current that it's not even worth trying. It would require a complex model, which depends on a lot of quantities that are themselves very difficult to accurately calculate, such as all the parasitic components, switching characteristics of the FETs, battery wires, etc. To calculate all of those requires a very, very lengthy and elaborate set of calculations and models. It's difficult enough that I wouldn't attempt it, and I'm a PhD student in EE. It would be far easier to build the thing and measure it.

I would suggest the following very crude estimate of ripple current for specifying the caps. Iripple = Imax*(tr+tf)/T, where Imax is the design maximum phase current, tr and tf are the rise and fall times, and T is the PWM period. This gives a crude and probably worst-case estimate of the RMS ripple current, assuming that the caps must supply all of the current during the switching time. For example, with 100 A max phase current, 1 us rise and fall times, and 50 us period (20 kHz), that gives Iripple = 4 A RMS. That seems like a reasonable ballpark number in terms of determining the required ripple current specification for the electrolytic caps. I suspect in most cases you would probably end up with more caps than this spec requires in order to get the desired ESR.

 

[Lagoethe]

It's difficult enough to make an accurate calculation of the input ripple current that it's not even worth trying. It would require a complex model, which depends on a lot of quantities that are themselves very difficult to accurately calculate, such as all the parasitic components, switching characteristics of the FETs, battery wires, etc. To calculate all of those requires a very, very lengthy and elaborate set of calculations and models. It's difficult enough that I wouldn't attempt it, and I'm a PhD student in EE. It would be far easier to build the thing and measure it.

You are right. It's easier to measure it. And I'll do it.
But by making a model I could understand better how thing really work, and by comparing it to the real thing I could understand how real things work. More over there are already some LT Spice models downloadable. So despite your advice, I'll try to make something that will take me quite a lot of time, at least to understand how the quantities you were talking to applies.

That seems like a reasonable ballpark number in terms of determining the required ripple current specification for the electrolytic caps. I suspect in most cases you would probably end up with more caps than this spec requires in order to get the desired ESR.

Then I may have not understand the ESR/ripple current thing.
Here is what I know:
From the given Input capacitor ripple current
I choose one or more low esr capacitor. If I choose more than one, I divide by the number of capacitor.
Then I calculate the ESR at specific frequency
Then I get Power dissipation: R x I²
Then heat inside capacitor with, Rthcase-air and Air temperature
Then I check if capacitor is burning or not.

So I get ESR from a calculated input capacitor ripple current.

My question is: why is there a ripple current spec on capacitor datasheet? What is their use? Is it to make a fast as lightining work?


Have a nice day

 

[Njay]

I suppose RMS rating is given as some form of relation to capacitor temperature. This is probably given at some temperature.

 

[rhitee05]

The ripple current rating of a capacitor is entirely based upon temperature. I assume that the rating probably specifies 25 C ambient, but it probably says on the datasheet. The ripple current dissipates power in the capacitor based on Irms^2*ESR, and capacitors are lousy at dissipating heat so the power must be kept fairly low. Lifetime of electrolytic caps is directly related to temperature, such that a 10 C decrease in temp is assumed to double the lifetime. There's usually endurance spec on the datasheets, too, 8000 hrs at 105 C or whatever. Obviously the operating temp of the cap depends not only on the ripple current but also on the ambient, which is strongly affected by the MOSFETs and other heat-generating parts nearby.

 

[Lagoethe]

I would suggest the following very crude estimate of ripple current for specifying the caps. Iripple = Imax*(tr+tf)/T

Sorry but I can't understand where this formula come from

Anyway I did models with LTSpice.
I find HUGE ripple current in input capacitor. Approximatively (in RMS) 2/3 of battery current (for a 3Phases controller).

I opened my crystalyte controller. Rated for 20A. I should have (2/3 x 20) 13.3A ripple current rated input capacitor. I found 3 Rubycon YXA 220uF 63V rated at 1650 mA.3x1650= 4.95A. that's way below 13.3A.

As you said before, and because I can't imagine the ripple current is so high, I'll have to measure it...

Have a nice day

 

[Njay]

I would suggest the following very crude estimate of ripple current for specifying the caps. Iripple = Imax*(tr+tf)/T

Sorry but I can't understand where this formula come from

It assumes the current is constant at its maximum, during the entire raise and fall times of the PWM wave. It's during these periods that current flows in and out of the capacitors. So it's a quite pessimistic approach, the current isn't obviously run at max for the entire switching period.

If we assume a 40A peak (say the controller limits the current to 40A on each PWM cycle), 10KHz PWM frequency (100us period) with 1us raise and 1us fall times, it gives 40 x 2us / 100us = 0.8A ripple. And it's a pessimistic approach...
On a 50mOhm ESR capacitor at those 10KHz, the energy dissipation would be 40A^2 x 50mOhm x (1us + 1us) / 100us = 1.6W, which I think is quite a bit on, let's say, 3 capacitors (533mW per capacitor). I guess we could refine the formula a little bit to make it more realistic which would work to our advantage. I like simple formulas, thank you rhitee

You can have LTspice calculate the average and rms values for you - presss CTRL and click a waveform name. It will calculate for the part of the waveform currently being displayed, so remember to display only a part where the system is already stable.

 

[rhitee05]

Anyway I did models with LTSpice.
I find HUGE ripple current in input capacitor. Approximatively (in RMS) 2/3 of battery current (for a 3Phases controller).

As I said before, it's decidedly non-trivial to come up with a model that's reasonably accurate at predicting the actual ripple current. And, it will be EXTREMELY controller-specific (based on the inductance, components, and so forth in the controller design), and even installation-specific because the length and routing of the battery wires, type/size of the battery, etc. will also probably play some role. So I'm not surprised that your model gives a result that can't possibly be true.

Also, I still think that ripple current isn't the most important spec for the capacitors. By the time you choose a set of caps which have the necessary capacitance and low enough ESR, the ripple current spec will most likely take care of itself.

 

[Njay]

Yep, so far it seems we're always heading to the same conclusion through several ways: given today's capacitor manufacturing quality, the critical characteristic for controller input is ESR.

 

[Lagoethe]

First I attached 2 docs they are .asc file (LTspice) so remove the .pdf to launch them.
You might need the .lib or I don't know what of the mosfet I used (IRFP4468). So, find a way to make it work (I have absolutely no idea how, still not familiar to LTSpice sorry) or use another Fet or use a switch instead.

You'll see that all is "work in progress", I assumed lot of things, used methods from ecircuitcenter.com. Many thing seem to work like they should.

You'll also discover that I find a way to High ripple current in the input capacitor.

I also discovered that I can't make a "all in one model", I was expecting that with our huge computering machinery I could find draw anything in a second,... but no.

It assumes the current is constant at its maximum, during the entire raise and fall times of the PWM wave. It's during these periods that current flows in and out of the capacitors. So it's a quite pessimistic approach, the current isn't obviously run at max for the entire switching period.

Understood!

You can have LTspice calculate the average and rms values for you - presss CTRL and click a waveform name. It will calculate for the part of the waveform currently being displayed, so remember to display only a part where the system is already stable.

Yes I discovered that. Very nice indeed

As I said before, it's decidedly non-trivial to come up with a model that's reasonably accurate at predicting the actual ripple current. And, it will be EXTREMELY controller-specific (based on the inductance, components, and so forth in the controller design), and even installation-specific because the length and routing of the battery wires, type/size of the battery, etc. will also probably play some role. So I'm not surprised that your model gives a result that can't possibly be true.

You are 1000% right

Also, I still think that ripple current isn't the most important spec for the capacitors. By the time you choose a set of caps which have the necessary capacitance and low enough ESR, the ripple current spec will most likely take care of itself.

Rated ripple current is the same as ESR in fact. We need one or the other from the datasheet and then apply the methodology of the supplier for specified T° and Frequency. But when I said that Ripple current is the key factor of the design, I meant the one "independant" from the chosen capacitor, design-dependant one. Sorry I can't explain better than that.

Last Note now using your formula (love it too)

Iripple = Imax*(tr+tf)/T

Means that the lower the frequency the less ripple current.

Real Last note now
For Buck converter designs, which look like DC motor designs, capacitor input ripple current is generally chosen to be 1/2 of output current. I'm afraid that with Iripple = Imax*(tr+tf)/T we could find a ripple, way below 1/2 Iout.

Looking forward for your ideas and suggestions

Have a nice day

 

[Arlo1]

So to simplify if your motor has less inductance will it meen you get higher or lower voltage spikes? My guess is on lower spikes with lower motor inductance.

 

[rhitee05]

So to simplify if your motor has less inductance will it meen you get higher or lower voltage spikes? My guess is on lower spikes with lower motor inductance.

No, motor inductance has very little (almost nothing) to do with the ripple current in the capacitors. Broadly speaking, there are two main factors.

1) How quickly current transitions between lower and upper FETs when a half-bridge changes state. This is mostly determined by the gate drive and the parasitic inductances associated with the FETs and the half-bridge + bus cap loop.

2) The inductances associated with the battery input - wires, board traces, bus caps, etc.

If you draw the ripple current waveform, part 1) affects how rapidly it increases and part 2) affects how rapidly it decreases back to zero. Part 1) has very little to do with the motor inductance as motor current is very nearly constant. Part 2) has absolutely nothing to do with motor inductance. It's all in the layout of the half-bridges, the bus caps, and the battery input.

 

[Alan B]

Is this right? With PWM at say 50%??

And he was asking about voltage spikes which is a bit different from current ripple?

 

[rhitee05]

Voltage spikes are caused by the same phenomena as the current ripple. Put another way, the current ripple is due to the capacitors absorbing voltage spikes.

Duty cycle shouldn't matter, except maybe at the very low and high extremes, since the ripple/spikes are mostly a function of the rise/fall times.

 

[Alan B]

Doesn't sound right. The cap ripple would max at roughly 50% PWM I would expect. Max time to charge while motor is not powered, then max time to discharge when motor is powered. Max voltage swing, max cap current.

 

[Lagoethe]

Doesn't sound right. The cap ripple would max at roughly 50% PWM I would expect. Max time to charge while motor is not powered, then max time to discharge when motor is powered. Max voltage swing, max cap current.

I agree with you, even if I don't know where this formula come from.
Check Page 9 http://satcom.tonnarelli.com/files/smps/SMPSBuckDesign_031809.pdf
and http://www.eetimes.com/design/power-management-design/4012532/Power-Tip-21-Watch-That-Capacitor-RMS-Ripple-Current-Rating-

I think simulation on LT Spice find the same value.

Now as I said before, for 3phases, I find very High input ripple currents, way over rated ripple current (~ESR) of the input capacitor of my controller (crystalyte).

There is something wrong here.

Edit : I found it !!! : http://www.pes.ee.ethz.ch/uploads/tx_ethpublications/round_JournalIEE_2006.pdf

 

[rhitee05]

Check Page 9 http://satcom.tonnarelli.com/files/smps ... 031809.pdf
and http://www.eetimes.com/design/power-man ... nt-Rating-

In both of these links they don't explain how the formulas are derived, but I believe they assume that the input current is constant and the capacitor handles the entire AC component of the input current. This is probably a decent assumption for power supplies that must meet EMI requirments, because they will have substantial input filter inductors that ensure the above is true. This is not a good assumption for the typical e-bike where there is no input filter, and in fact where you really want to minimize the inductance on the input. It also results in a very large ripple current specification, Iripple = I/2. If you want to size you cap bank to be able to supply half of your peak phase current, be my guest. The situation becomes very different when we try to minimize the input inductance, because then the battery is supplying a large portion of the AC component of the current, and the caps exist just to smooth things.

Edit : I found it !!! : http://www.pes.ee.ethz.ch/uploads/tx_et ... E_2006.pdf

This isn't even a valid comparison. This refers to a sinusoidal inverter which is line-fed via a rectifier. There are some similarities, but enough differences to make it not worth very much.

 

[Lagoethe]

I apologize to put this thread out of the grave but i'm designing a motor controler and I (once again) am blocked on the capacitors again!

In the attached file there is a way to estimate the capacitor ripple current

page 539:

According to Fig. 5, the current stress on the DC-link capacitor is dependent of the fundamental displacement factor cosf. For the case where the inverter controls a permanent-magnet AC machine (with near unity power
actor), then the worst-case current-stress estimation, usedas a basis for the capacitor dimensioning, is given by:

So this can be used to BLDC motor am I right?

Here are my questions:
from the abaques n°5, we can know the Ic,rms which is the rms value of the input capacitor.

To find it we need to know:
In, rms: which is the max rms value of our design, the rms value of the current going in (or out) of the mosfets (all of them).
phi: which is the displacement of the motor. we assume that we are in the best place were phi = Pi/2.
M: which is the modulation index.

So we see that the only value we miss is the modulation index.

M = Uu/(1/2 Uo)
Uu is the output voltage (on each phase ?)
Uo is the input voltage so nearly equals batery voltage (so Uo is known)

Is there a way to link Uu and Rphase and Lphase and Iphase ????

I think If we solve this equation, we'll be able, if we know the caracteristics of the motor, to design the DC capacitor

I really hope You'll help me

Have a nice day

 

[Arlo1]

Wow I have to go re-read this whole thread... Now that I kinda understand it a bit lol.

 

[Njay]

Yep, so far it seems we're always heading to the same conclusion through several ways: given today's capacitor manufacturing quality, the critical characteristic for controller input is ESR.

... and ESL!!!!!

First of all need to understand capacitor better and what are the options, and this is a very nice and concise doc on that:

http://www.kemet.com/kemet/web/homepage/kfbk3.nsf/vaFeedbackFAQ/BEC706CDDF53DFC785257B4800579637/$file/Avnet2012PowerForum_CapacitorsSelection.pdf

I'm amazed at the lack of ripple current specs at the capacitors datasheets. Simply can't compare on that vector.

 

[HighHopes]

hi Njay, in reply to your PM i thought i would post more thorough explanation here for further discussion with forum.

When evaluating components it’s really important to consider the application, design requirements and the technology involved.

Application:
we are not calculating ripple current for a DC/DC converter but a 3-phase VSI inerter. there is a big difference here.. the inverter has bEMF due to motor load which fights the bus voltage and so limits the current ripple at high RPM (a good thing), the frequency on the DC bus is 2xfsw because not one phase leg switching but two, phase shifted.
The input supply is from a battery NOT a rectified AC so there is no reason to ask our DC Link cap to perform filter function, so those calculations can be ignored (i.e. not limiting factor) unless you have an EMI requirement to meet. The failure modes are different, expectations are different.

Design Requirements:
it could be that cost is the #1 design requirement, ahead of functional, ahead of reliability. it could be EMI if you have a specific need to keep this minimized, it could be long life, could be anything. but it helps to have it clear in your mind what your priorities are and in what order because this will help guide discussions especially those that have trade-offs (engineering is all about trade-offs).

Technology:
Electrolytic caps are low cost which makes them attractive for first consideration. It will be interesting to see if, at the end of the evaluation, if they are still considered cheap(er) than other technology. Electrolytics have high ESR/ESL so the limiting factor in the design is how much heat is generated due to ripple current because the capacitor life is cut in half for ever 5degC rise and so the calculation tends towards how many caps in parallel are required to share ripple current rather than how much total uF cap value would be appropriate for desired ripple voltage. This is a significant statement... due to cost requirement, what is being said is that the DC link capacitor uF value cannot be chosen optimally for the application. So straight off we recognize not to have an optimal solution and thus we keep this in mind to look closely at what we must pay for in order to have benefit of low cost electrolytics… there are always trade-offs.

The other dielectric to consider for DC link cap in VSI application is Metalized Polypropelene Film due to its low ESR/ESL and self healing properties which makes is vastly superior. I'll make the argument that it is CHEAPER solution too.

on personal note, i only ever used Polypropelene or other custom made specials for DC link cap in VSI application. i have no experience with electrolytic.

 

[HighHopes]

For electrolytic Caps, ripple current is the deciding factor in establishing DC link capacitance value which depends on battery voltage, phase inductance and duty cycle. The maximum ripple occurs when the bus voltage is lowest allowable (battery near discharged) and duty cycle is 50%. Thus we can eliminate two variable in the equation by setting d = 0.5 (worse case). The phase inductance is also fixed because your motor is pre-selected (how did you get 2.64uH?, that is incredibly low value). Let’s assume phase inductance is accurate, then likely 20kHz switching frequency is too low for such a motor because control bandwidth requirement will be high. To get high control bandwidth probably 100kHz would be more appropriate but good luck keeping the MOSFET power dissipation low.

Battery voltage also fixed due to design requirement so.. we just go ahead and calculate ripple current delta_I:

Ripple Current:
delta_I = d*(1-d)*Vbus/(f*L)
delta_I = 0.5*(1-0.5)*72V/(100kHz*2.64uH)
delta_I = 69App or 49Arms

So how many parallel electrolytic capacitors are needed? Let’s say we arbitrarily chose Panasonic TS-ED series because the advertising for this cap makes us think it is useful for inverter application. So, assuming 60degC ambient max, looks like we would need about 5 x 560uF caps (digikey price of 5*$2.75 = $13.75). That’s ~2.5mF .. wow.. that’s a lot. Now, the next person could argue, just use ONE 560uF to achieve desired voltage ripple could be used; hooks it up turns it ON and it works so says “see you wasted money buying five”. But what is the temperature rise of the capacitor when it is presented with 49Arms and what is the life expectancy?

With 2.5mF of electrolytic capacitor there is no need to calculate the voltage ripple, for sure it is acceptable. But anyway, we will check

Voltage Ripple:
I=C*dV/dt
We know current expected from cap is the ripple current previously calculated 49Arms.
Have to integrate both sides to get delta_V (at 50% duty), some math magic and:
delta_V = Vbattery/(32*L*C*f^2)

delta_V = 72/(32*2.64uH*2.5mF*100k^2) <-- Note that Vbattery should have been the fully charged pack value
delta_V = 0.03Vpp or about 0.05%.

Wow.. really exceeded any reasonable requirement for bus voltage ripple.

Still at cost of $13.75, seems attractive. But such large DC link capacitance comes with other draw backs that need solutions which cost money (inrush, cap bleed for safety, replacement every 5 years and all of these things are sized for the 2.5mF cap!).

* added note to use fully charged pack value when assessing voltage ripple

 

[HighHopes]

For polypropylene film capacitors (proper choice dielectric for VSI application) the situation is different because ripple current rating tends to be at least 10x that of electrolytic. So we skip ahead to determine the voltage ripple allowable first and then second check current ripple (heating). Seems we are just swapping around order of events but don’t miss how important this is. It means we can select DC link capacitor based on energy balance rather than heating limits which is optimal method.

We assume an allowable voltage ripple, for VSI application tends to be 3 to 5%; I always used 5% unless told otherwise.

Voltage Ripple:
delta_V = Vbattery/(32*L*C*f^2)  rearrange, solve for C
C=Vbattery/(32*L*delta_V*f^2)  delta_V = 5%*72 = 3.6V
C=72/(32*2.64uH*3.6*100k^2) <-- Note that Vbattery should have been the fully charged pack value
C = 24uF.

For part number Panasonic EZPE series 50uF, cost is $15. Current ripple rating on this part is 16Arms at 10kHz. Assuming this cap has at least same multiplying factor as electrolytic for ambient temp of 60C (multiplier 2.2) and switching frequency of 100kHz (multiplier 1.5) then 16Arms * 1.5*2.2 = 52.8Arms > 49Arms. Good!

Ya… quite a bit smaller than 2.5mF! So you save money on packaging, time to install. Also the same inrush limiter, safety discharge is sized now for much smaller cap. And replacement ever 20years..

Oh, and did I mention that because of the much lower self inductance, and tighter overall bus-bar packaging, the voltage spikes will be less which is always desirable.

so.. which solution is cheaper?

 

[HighHopes]

Other factors:
So the above considers capacitor dielectric & capacity to suit application and argument made that polypropylene is not an expensive solution. Now we must consider some other application specific factors that may (or may not) influence your decision on cap size.

Load dynamics:
If you have high acceleration then the cap may be asked to supply some of that current for first instant.

Regenerative breaking:
Depends on how fast your battery can take the energy, if the regenerative energy comes faster then the cap will take it raising the voltage. May need big cap to handle this, or, electronics to dissipate excess energy, or reduce ability to regenerate (slower deceleration).

BLDC/Induction:
BLDC motors have magnets so no need to ask inverter to supply magnetic field (medium through which torque is transferred to rotor). But, for induction motor this current (Id) comes from inverter since the machine has no magnets. It is not possible for the battery to supply reactive energy so it all comes from the cap meaning the capacity has to be about 15% higher.

Stiff bus during fault detection:
If your gate drive or phase current sensor has some sort of fault current shut-down, then the cap must supply the fault current for as long as it takes for system to detect fault and tell MOSFET to open. 10uS? The bus voltage is not allowed to drop more than 20% during this time or else fault shut down may not work properly.

Source impedance:
If your battery and/or cable has high source impedance then the voltage will drop as you accelerate. The cap has to take up this droop so is sized higher in proportion to source impedance and acceleration rate.

Filtering/EMI:
Generally not an issue when sourced from battery.